The Seventeenth Asian Test Symposium Tutorials
Tutorial 1
Statistical Screening Methods Targeting "Zero Defect" IC Quality and Reliability
Presenter:
Adit Singh, Auburn University
Summary:
Integrated circuits have traditionally all been tested identically in the manufacturing flow. However, as the detection of subtle manufacturing flaws becomes ever more challenging and expensive in aggressively scaled nanometer technologies, innovative new statistical screening methods are being developed that attempt to improve test effectiveness and optimize test costs by adaptively subjecting “suspect” parts to more extensive testing. The idea is similar to security screening at airports. Such methods fall into two broad categories: those that exploit the statistics of defect distribution on wafers, and those that exploit the correlation in the variation of process and performance parameters on wafers. This tutorial presents test methodologies that span both these categories, and illustrates their effectiveness with results from a number of recently published experimental studies on production circuits from IBM, Intel and LSI Logic, and NXP Semiconductor.
Tutorial 2
Delay Testing: Theory and Practice
Presenters:
Srinivas Patil, Intel Corporation
Sreejit Chakravarty, LSI Corporation
Summary:
The goal of this tutorial is to provide the background and knowledge of DFT methods, tools/methodologies and best-known industry practices necessary for implementation of delay test methodology on both custom and ASIC designs. To that end, this tutorial will cover the following key aspects of delay tests: (1) Delay test models and test application techniques, (2) Incorporating environmental conditions such as cross-talk and power droop in delay tests, (3) DFT design techniques to support scan-based delay test, (4) Relevant tools and methodologies and (5) Representative test case studies from the industry. The focus of the tutorial will be primarily scan-based delay tests with emphasis on real-world implementation using industrial case studies. On the theory front, the emphasis will be on the easy to understand theoretical concepts related to delay test, and not on the complicated algebra and theory which accompanies many theoretical works on delay test.